Datasheet Details
| Part number | SN54LV10A |
|---|---|
| Manufacturer | Texas Instruments |
| File Size | 921.64 KB |
| Description | TRIPLE 3-INPUT POSITIVE-NAND GATE |
| Datasheet | SN54LV10A-etcTI.pdf |
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Overview: SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C D Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C D Ioff Supports Partial-Power-Down Mode Operation D Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005 SN54LV10A . . . J OR W PACKAGE SN74LV10A . . . D, DB, DGV, NS, OR PW PACKAGE (TOP VIEW) 1A 1B 2A 2B 2C 2Y GND 1 2 3 4 5 6 7 14 VCC 13 1C 12 1Y 11 3C 10 3B 9 3A 8 3Y SN54LV10A . . .
| Part number | SN54LV10A |
|---|---|
| Manufacturer | Texas Instruments |
| File Size | 921.64 KB |
| Description | TRIPLE 3-INPUT POSITIVE-NAND GATE |
| Datasheet | SN54LV10A-etcTI.pdf |
|
|
|
/ordering information These triple 3-input positive-NAND gates are designed for 2-V to 5.5-V VCC operation.
The ’LV10A devices perform the Boolean function Y = A • B • C or Y = A + B + C in positive logic.
These devices are fully specified for partial-power-down applications using Ioff.
| Part Number | Description |
|---|---|
| SN54LV11A | TRIPLE 3-INPUT POSITIVE-AND GATES |
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| SN54LV138A | 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXER |
| SN54LV139A | DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXER |
| SN54LV14A | Hex Schmitt-Trigger Inverter |
| SN54LV157A | QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXER |
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| SN54LV163A | 4-BIT SYNCHRONOUS BINARY COUNTER |