SN54LVT16543 Datasheet | Texas Instruments

SN54LVT16543, SN74LVT16543 3.3ĆV ABT 16ĆBIT REGISTERED TRANSCEIVERS WITH 3ĆSTATE OUTPUTS SCBS148C - MAY 1992 - REVISED JULY 1995 D State-of-the-Art Advanced Bi CMOS Technology (ABT) Design for 3.3-V Operation and Low-Static Power Dissipation D Members of the Texas Instruments Widebus  Family D Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC ) D Support Unregulated Battery Operation Down to 2.7 V D Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C D ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 p F, R = 0) D Latch-Up Performance Exceeds 500 m A Per JEDEC Standard JESD-17 D Bus-Hold Data Inputs Eliminate the Need for External Pullup Resistors D Support Live Insertion D Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise D Flow-Through Architecture Optimizes PCB Layout D Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings SN54LVT16543 . . . WD PACKAGE SN74LVT16543 . . . DGG OR DL PACKAGE (TOP VIEW) 1OEAB 1 1LEAB 2 1CEAB 3 GND 4 1A1 5 1A2 6 VCC 7 1A3 8 1A4 9 1A5 10 GND 11 1A6 12 1A7 13 1A8 14 2A1 15 2A2 16 2A3 17 GND 18 2A4 19 2A5 20 2A6 21 VCC 22 2A7 23 2A8 24 GND 25 2CEAB 26 2LEAB 27 2OEAB...