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• State-of-the-Art BiCMOS Design
Significantly Reduces ICCZ
• High-Impedance State During Power Up and
Power Down
• ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model (C = 200 pF,
R = 0)
• Designed to Facilitate Incident-Wave
Switching for Line Impedances of 25 Ω or
Greater
• Distributed VCC and GND Pins Minimize
Noise Generated by the Simultaneous
Switching of Outputs
• Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic 300-mil DIPs (NT)
SN64BCT25244 25ĆΩ OCTAL BUFFER/DRIVER
WITH 3ĆSTATE OUTPUTS
SCBS477 − DECEMBER 1992 − REVISED JANUARY 1994
DW OR NT PACKAGE (TOP VIEW)
1Y1 1 GND 2 1Y2 3 1Y3 4 GND 5 1Y4 6 2Y1 7 GND 8 2Y2 9 2Y3 10 GND 11 2Y4 12
24 1OE 23 1A1 22 1A2 21 VCC 20 1A3 19 1A4 18 2A1 17 2A2 16 VCC 15 2A3 1