SN65LVDM180 Datasheet | Texas Instruments

FEATURES - Low-Voltage Differential 50-Ω Line Drivers and Receivers - Typical Full-Duplex Signaling Rates of 100 Mbps (See Table 1) - Bus-Terminal ESD Exceeds 12 k V - Operates From a Single 3.3-V Supply - Low-Voltage Differential Signaling With Typical Output Voltages of 340 m V With a 50-Ω Load - Valid Output With as Little as 50-m V Input Voltage Difference - Propagation Delay Times - Driver: 1.7 ns Typical - Receiver: 3.7 ns Typical - Power Dissipation at 200 MHz - Driver: 50 m W Typical - Receiver: 60 m W Typical - LVTTL Input Levels Are 5-V Tolerant - Driver Is High Impedance When Disabled or With VCC < 1.5 V - Receiver Has Open-Circuit Failsafe DESCRIPTION The SN65LVDM179, SN65LVDM180, SN65LVDM050, and SN65LVDM051 are differential line drivers and receivers that use low-voltage differential signaling (LVDS) to achieve high signaling rates. These circuits are similar to TIA/EIA-644 standard pliant devices (SN65LVDS) counterparts, except that the output current of the drivers is doubled. This modification provides a minimum differential output voltage magnitude of 247 m V across a 50-Ω load simulating two transmission lines in parallel. This allows having data buses with more than one driver or with two line termination resistors. The receivers detect a voltage difference of 50 m V with up to 1 V of ground potential difference between a transmitter and receiver. The intended application of these devices and signaling techniques is point-to-point half duplex, baseband data transmission over a controlled impedance media of approximately 100 Ω characteristic impedance. SN65LVDM179D (Marked as DM179 or LVM179) SN65LVDM179DGK (Marked as M79) (TOP VIEW) VCC 1 R2 D3 GND 4 8A 7B 6Z 5Y 3 D 2 R SN65LVDM180D (Marked as LVDM180) SN65LVDM180PW (Marked as LVDM180) (TOP VIEW) NC 1 R2 RE 3 DE 4 D5 GND 6 GND 7 14 VCC 13 VCC 12 A 11 B 10 Z 9Y 8 NC 5...