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SN65LVDS100 - Differential Translator/Repeater

General Description

The SN65LVDS100, SN65LVDT100, SN65LVDS101, and SN65LVDT101 are high-speed differential receivers and drivers connected as repeaters.

Key Features

  • 1 Designed for Signaling Rates ≥ 2 Gbps.
  • Total Jitter < 65 ps.
  • Low-Power Alternative for the MC100EP16.
  • Low 100-ps (Maximum) Part-to-Part Skew.
  • 25 mV of Receiver Input Threshold Hysteresis Over 0-V to 4-V Input Voltage Range.
  • Inputs Electrically Compatible With LVPECL, CML, and LVDS Signal Levels.
  • 3.3-V Supply Operation.
  • LVDT Integrates 110-Ω Terminating Resistor.
  • Offered in SOIC and MSOP 2.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Product Folder Sample & Buy Technical Documents Tools & Software Support & Community Reference Design SN65LVDS100, SN65LVDT100, SN65LVDS101, SN65LVDT101 SLLS516E – AUGUST 2002 – REVISED JULY 2015 SN65LVDx10x Differential Translator/Repeater 1 Features •1 Designed for Signaling Rates ≥ 2 Gbps • Total Jitter < 65 ps • Low-Power Alternative for the MC100EP16 • Low 100-ps (Maximum) Part-to-Part Skew • 25 mV of Receiver Input Threshold Hysteresis Over 0-V to 4-V Input Voltage Range • Inputs Electrically Compatible With LVPECL, CML, and LVDS Signal Levels • 3.