Download SN65LVDS150 Datasheet PDF
SN65LVDS150 page 2
Page 2
SN65LVDS150 page 3
Page 3

SN65LVDS150 Description

The MuxIt is a family of general-purpose, multiple-chip building blocks for implementing parallel data serializers and deserializers. The system allows for wide parallel data to be transmitted through a reduced number of differential transmission lines over distances greater than can be achieved with a single-ended (e.g., LVTTL or LVCMOS) data interface. The number of bits multiplexed per transmission line is user...

SN65LVDS150 Key Features

  • A Member of the MuxIt™ SerializerDeserializer Building-Block Chip Family
  • Pin Selectable Frequency Multiplier Ratios Between 4 and 40
  • Input Clock Frequencies From 5 to 50 MHz
  • Internal Loop Filters and Low PLL-Jitter of 20 ps RMS Typical at 200 MHz
  • LVDS patible Differential Inputs and Outputs Meet or Exceed the Requirements of ANSI EIA/TIA-644-A
  • LVTTL patible Inputs Are 5 V Tolerant
  • LVDS Inputs and Outputs ESD Protection
  • Operates From a Single 3.3 V Supply
  • Packaged in 28-Pin Thin Shrink Small-Outline
  • No internal connection