SN65LVDS310
FEATURES
- Serial Interface Technology
- patible With Flat Link™ 3G Transmitters
(E.g., SN65LVDS305 or SN65LVDS307)
- Supports Video Interfaces up to 24-Bit RGB Data and 3 Control Bits Received Over One Sub LVDS Differential Data Line
- Sub LVDS Differential Voltage Levels
- Up to 405-Mbps Data Throughput
- Three Operating Modes to Conserve Power
- Active mode QVGA: 17 m W
- Typical Shutdown: 0.7 µW
- Typical Standby Mode: 67 µW Typical
- ESD Rating > 4 k V (HBM)
- Pixel-Clock Range of 4 MHz- 15 MHz
- Failsafe on All CMOS Inputs
- Packaged in 4-mm × 4-mm Micro Star Junior™µBGA® With 0,5-mm Ball Pitch
- Very Low EMI
APPLICATIONS
- Small Low-Emission Interface Between Graphics Controller and LCD Display
- Mobile Phones and Smart Phones
- Portable Multimedia Players
DESCRIPTION
The SN65LVDS310 receiver deserializes Flat Link 3G-pliant serial input data to 27 parallel data outputs. The SN65LVDS310 receiver contains one shift register to load 30 bits from one serial input and latches the 24 pixel...
