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SN65LVDS310 - PROGRAMMABLE 27-BIT SERIAL-TO-PARALLEL RECEIVER

Description

The SN65LVDS310 receiver deserializes FlatLink 3G-compliant serial input data to 27 parallel data outputs.

Features

  • Serial Interface Technology.
  • Compatible With FlatLink™ 3G Transmitters (E. g. , SN65LVDS305 or SN65LVDS307).
  • Supports Video Interfaces up to 24-Bit RGB Data and 3 Control Bits Received Over One SubLVDS Differential Data Line.
  • SubLVDS Differential Voltage Levels.
  • Up to 405-Mbps Data Throughput.
  • Three Operating Modes to Conserve Power.
  • Active mode QVGA: 17 mW.
  • Typical Shutdown: 0.7 µW.
  • Typical Standby Mode: 67 µW Typic.

📥 Download Datasheet

Datasheet preview – SN65LVDS310

Datasheet Details

Part number SN65LVDS310
Manufacturer Texas Instruments
File Size 1.60 MB
Description PROGRAMMABLE 27-BIT SERIAL-TO-PARALLEL RECEIVER
Datasheet download datasheet SN65LVDS310 Datasheet
Additional preview pages of the SN65LVDS310 datasheet.

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Full PDF Text Transcription

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www.ti.com SN65LVDS310 SLLS836 – MAY 2007 PROGRAMMABLE 27-BIT SERIAL-TO-PARALLEL RECEIVER FEATURES • Serial Interface Technology • Compatible With FlatLink™ 3G Transmitters (E.g., SN65LVDS305 or SN65LVDS307) • Supports Video Interfaces up to 24-Bit RGB Data and 3 Control Bits Received Over One SubLVDS Differential Data Line • SubLVDS Differential Voltage Levels • Up to 405-Mbps Data Throughput • Three Operating Modes to Conserve Power – Active mode QVGA: 17 mW – Typical Shutdown: 0.
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