SN65LVDT14-EP Datasheet | Texas Instruments

FEATURES - Controlled Baseline - One Assembly/Test Site, One Fabrication Site - Enhanced Diminishing Manufacturing Sources (DMS) Support - Enhanced Product-Change Notification - Qualification Pedigree (1) - Integrated 110-Ω Nominal Receiver Line Termination Resistor - Operate From a Single 3.3-V Supply - Greater Than 125-Mbps Data Rate - Flow-Through Pinout - LVTTL-patible Logic I/Os - ESD Protection on Bus Pins Exceeds 12 k V - Meet or Exceed Requirements of ANSI/TIA/EIA-644A Standard for LVDS - 20-Pin Thin Shrink Small-Outline Package (PW) With 26-Mil Terminal Pitch (1) ponent qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold pound life. Such qualification testing should not be viewed as justifying use of this ponent beyond specified performance and environmental limits. APPLICATIONS - Memory Stick™ Interface Extensions With Long Interconnects Between Host and Memory Stick - Serial Peripheral Interface™ (SPI™) Interface Extension to Allow Long Interconnects Between Master and Slave - Multi Media Card™ (MMC) Interface in SPI Mode - General-Purpose Asymmetric Bidirectional munication DESCRIPTION The SN65LVDT14 bines one LVDS line driver with four terminated LVDS line receivers in one package. It is designed to be used at the Memory Stick™ end of an LVDS-based Memory Stick interface extension. The SN65LVDT41 bines four LVDS line drivers with a single terminated LVDS line receiver in one package. It is designed to be used at the host end of an LVDS-based Memory Stick interface extension. brk brk Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this...