SN74ABTH32245 Datasheet | Texas Instruments

D Members of the Texas Instruments Widebus+™ Family D State-of-the-Art EPIC-ΙΙB™ Bi CMOS Design Significantly Reduces Power Dissipation D Latch-Up Performance Exceeds 500 m A Per JEDEC Standard JESD-17 D Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 5 V, TA = 25°C D High-Impedance State During Power Up and Power Down D Released as DSCC SMD 5962-9557701NXD D PZ Package Qualified for Military Per MIL-PRF-38535 (QML) SN54ABTH32245, SN74ABTH32245 36-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS228G - JUNE 1992 - REVISED MAY 1997 D Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise D High-Drive Outputs (- 32-m A IOH, 64-m A IOL) D Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors D Package Options Include 100-Pin Plastic Thin Quad Flat (PZ) Package With 14 × 14-mm Body Using 0.5-mm Lead Pitch and Space-Saving 100-Pin Ceramic Quad Flat (HS) Package† ’ABTH32245 . . . PZ PACKAGE (TOP VIEW) 1A8 1A7 1A6 GND 1A5 1A4 1A3 1A2 1A1 GND 1DIR 1OE VCC 2OE 2DIR GND 1B1 1B2 1B3 1B4 1B5 GND 1B6 1B7 1B8 1A9 2A1 GND 2A2 2A3 2A4 2A5 GND 2A6 2A7 2A8 2A9 VCC 3A1 3A2 3A3 3A4 GND 3A5 3A6 3A7 3A8 GND 3A9 4A1 10099 98 9796 959493 92 91 90 89 88 87 86 85 84 83 8281 80 79 78 77...