SN74ACT574 Datasheet | Texas Instruments

Features - Operation of 4.5-V to 5.5-V VCC - Inputs accept voltages to 5.5 V - Max tpd of 9 ns at 5 V - Inputs are TTL-Voltage patible 2 Description These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. Package Information PART NUMBER PACKAGE1 BODY SIZE (NOM) DB (SSOP, 20) 7.50 mm × 5.30 mm DW (SOIC, 20) 12.80 mm × 7.50 mm N (PDIP, 20) 25.40 mm × 6.35 mm NS (SOP, 20) 12.6 mm × 5.3 mm PW (TSSOP, 20) 6.50 mm × 4.40 mm 1. For all available packages, see the orderable addendum at the end of the data sheet. Figure 2-1. Logic Diagram (Positive Logic) An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA. SCAS537E - OCTOBER 1995 - REVISED MAY 2023 .ti. Table of Contents 1 Features 1 2 Description 1 3 Revision History 2 4 Pin Configuration and Functions 3 5 Specifications 4 5.1 Absolute Maximum Ratings 4 5.2 Remended Operating Conditions 4 5.3 Thermal Information 4 5.4 Electrical Characteristics 5 5.5 Timing Requirements 6 5.6 Switching Characteristics 6 5.7 Operating...