SN74AHC00-EP Datasheet | Texas Instruments

SN74AHC00-EP QUADRUPLE 2-INPUT POSITIVE-NAND GATE D Controlled Baseline - One Assembly/Test Site, One Fabrication Site D Extended Temperature Performance of - 55°C to 125°C D Enhanced Diminishing Manufacturing Sources (DMS) Support D Enhanced Product Change Notification D Qualification Pedigree† D EPIC (Enhanced-Performance Implanted CMOS) Process † ponent qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold pound life. SGDS026 - JULY 2002 D Operating Range 2-V to 5.5-V VCC D ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 p F, R = 0) D OR PW PACKAGE (TOP VIEW) 1A 1 1B 2 1Y 3 2A 4 2B 5 2Y 6 GND 7 14 VCC 13 4B 12 4A 11 4Y 10 3B 9 3A 8 3Y description + + ) The SN74AHC00 performs the Boolean function Y A - B or Y A B in positive logic. ORDERING INFORMATION PACKAGE‡ ORDERABLE PART NUMBER TOP-SIDE MARKING - 55°C to 125°C SOIC - D TSSOP - PW Tape and reel Tape and...