SN74AHCT74-EP Datasheet | Texas Instruments

description /ordering information The SN74AHCT74 is a dual positive-edge-triggered D-type flip-flop. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. ORDERING INFORMATION PACKAGE‡ ORDERABLE PART NUMBER TOP-SIDE MARKING - 55°C to 125°C SOIC - D TSSOP - PW Tape and reel Tape and reel SN74AHCT74MDREP SN74AHCT74MPWREP AHCT74MEP AHT74EP ‡ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at .ti./sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright  2003, Texas Instruments Incorporated - POST OFFICE BOX 655303 DALLAS, TEXAS 75265 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET SCLS495- JUNE 2003 FUNCTION TABLE INPUTS OUTPUTS PRE CLR CLK...