SN74ALS193A Datasheet | Texas Instruments

description The ’ALS193A are synchronous, reversible, 4-bit up/down binary counters. Synchronous counting operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when instructed by the steering logic. This mode of operation eliminates the output counting spikes normally associated with asynchronous (rippleclock) counters. The outputs of the four flip-flops are triggered on a low-to-high-level transition of either count/clock (UP or DOWN) input. The direction of the count is determined by which count input is pulsed while the other count input is high. SN54ALS193A . . . J PACKAGE SN74ALS193A . . . D OR N PACKAGE (TOP VIEW) B1 QB 2 QA 3 DOWN 4 UP 5 QC 6 QD 7 GND 8 16 VCC 15 A 14 CLR 13 BO 12 CO 11 LOAD 10 C 9D SN54ALS193A . . . FK PACKAGE (TOP VIEW) QA DOWN NC UP QC 3 2 1 20 19 9 10 11 12 13 CLR BO NC CO LOAD - No internal connection All four counters are fully programmable; that is, each output may be preset to either level by placing a low on the load (LOAD) input and entering the desired data at the data inputs. The output changes to agree with the data inputs independently of the count pulses. This feature allows the counters to be used as modulo-N dividers by simply modifying the count length with the preset inputs. A high level applied to the clear (CLR) input forces all outputs to the low level. The clear function is independent of the count and LOAD inputs. The UP, DOWN, and LOAD inputs are buffered to lower the drive requirement, which significantly reduces the loading on, or current required by, clock drivers, etc., for long parallel...