Texas Instruments SN74ALS873B
The SN74ALS873B and SN74AS873A are characterized for operation from 0°C to 70°C.SN54ALS873B, SN54AS873A, SN74ALS873B, SN74AS873A DUAL 4ĆBIT DĆTYPE LATCHES WITH 3ĆSTATE OUTPUTS SDAS036D − APRIL 1982 − REVISED AUGUST 1995
● 3-State Buffer-Type Outputs Drive Bus Lines Directly
● Bus-Structured Pinout
● Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Plastic (NT) and Ceramic (JT) DIPs description These dual 4-bit D-type latches feature 3-state outputs designed specifically for bus driving. These devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The dual 4-bit latches are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs in true form, according to the function table. When LE is low, the outputs are latched. When the clear (CLR) input goes low, the Q outputs go low independently of LE. The outputs are in the high-impedance state when the output-enable (OE) input is at a high logic level.
● 3-State Buffer-Type Outputs Drive Bus Lines Directly
● Bus-Structured Pinout
● Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Plastic (NT) and Ceramic (JT) DIPs description These dual 4-bit D-type latches feature 3-state outputs designed specifically for bus driving. These devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The dual 4-bit latches are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs in true form, according to the function table. When LE is low, the outputs are latched. When the clear (CLR) input goes low, the Q outputs go low independently of LE. The outputs are in the high-impedance state when the output-enable (OE) input is at a high logic level.