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FEATURES
• Operates From 1.65 V to 3.6 V • Max tpd of 3 ns at 3.3 V • ±24-mA Output Drive at 3.3 V • Latch-Up Performance Exceeds 250 mA Per
JESD 17
D, DGV, NS, OR PW PACKAGE (TOP VIEW)
SN74ALVC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATE
SCES115G – JULY 1997 – REVISED AUGUST 2004
• ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101)
RGY PACKAGE (TOP VIEW)
VCC
1A
1A 1 1B 2 1Y 3 2A 4 2B 5 2Y 6 GND 7
14 VCC 13 4B 12 4A 11 4Y 10 3B 9 3A 8 3Y
1 1B 2 1Y 3 2A 4 2B 5 2Y 6
7
14 13 4B 12 4A 11 4Y 10 3B 9 3A
8
3Y
GND
DESCRIPTION/ORDERING INFORMATION
This quadruple 2-input positive-NAND gate is designed for 1.65-V to 3.6-V VCC operation.