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SN74ALVC16834 - 18-BIT UNIVERSAL BUS DRIVER

General Description

This 18-bit universal bus driver is designed for 1.65-V to 3.6-V VCC operation.

Data flow from A to Y is controlled by the output-enable (OE) input.

The device operates in the transparent mode when the latch-enable (LE) input is low.

Key Features

  • Member of the Texas Instruments Widebus™ Family.
  • Operates From 1.65 V to 3.6 V.
  • Max tpd of 3.6 ns at 3.3 V.
  • ±24-mA Output Drive at 3.3 V.
  • Latch-Up Performance Exceeds 250 mA Per JESD 17.
  • ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101).

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.ti.com FEATURES • Member of the Texas Instruments Widebus™ Family • Operates From 1.65 V to 3.6 V • Max tpd of 3.6 ns at 3.3 V • ±24-mA Output Drive at 3.3 V • Latch-Up Performance Exceeds 250 mA Per JESD 17 • ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101) DESCRIPTION/ORDERING INFORMATION This 18-bit universal bus driver is designed for 1.65-V to 3.6-V VCC operation. Data flow from A to Y is controlled by the output-enable (OE) input. The device operates in the transparent mode when the latch-enable (LE) input is low. The A data is latched if the clock (CLK) input is held at a high or low logic level. If LE is high, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK.