SN74ALVCH162827 Datasheet | Texas Instruments

FEATURES - Member of the Texas Instruments Widebus™ Family - Output Ports Have Equivalent 26-Ω Series Resistors, So No External Resistors Are Required - Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors - Latch-Up Performance Exceeds 250 m A Per JESD 17 - ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101) DESCRIPTION /ORDERING INFORMATION This 20-bit noninverting buffer/driver is designed for 1.65-V to 3.6-V VCC operation. The SN74ALVCH162827 is posed of two 10-bit sections with separate output-enable signals. For either 10-bit buffer section, the two output-enable (1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must both be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 10-bit buffer section are in the high-impedance state. The outputs, which are designed to sink up to 12 m A, include equivalent 26-Ω resistors to reduce overshoot and undershoot. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. SN74ALVCH162827 20-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS SCES013H - JULY 1995 - REVISED AUGUST 2004 DGG, DGV, OR DL PACKAGE (TOP VIEW) 1OE1 1 1Y1 2 1Y2 3 GND 4 1Y3 5 1Y4 6 VCC 7 1Y 8 1Y6 9 1Y7 10 GND 11 1Y8 12 1Y9 13 1Y10 14 2Y1 15 2Y2 16 2Y3 17 GND 18 2Y4 19 2Y5 20 2Y6 21 VCC 22 2Y7 23 2Y8 24 GND 25 2Y9 26 2Y10 27 2OE1 28 56 1OE2 55 1A1 54 1A2 53 GND 52 1A3 51 1A4 50 VCC 49 1A5 48 1A6 47 1A7 46 GND 45 1A8 44 1A9 43 1A10 42 2A1 41 2A2 40 2A3 39 GND 38 2A4 37 2A5 36 2A6 35 VCC 34 2A7 33 2A8 32 GND 31 2A9 30 2A10 29 2OE2 Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not remended. TA -40°C to 85°C ORDERING INFORMATION PACKAGE (1) ORDERABLE...