SN74ALVCH16901
description
/ordering information
This 18-bit (dual-octal) noninverting registered transceiver is designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVCH16901 is a dual 9-bit to dual 9-bit parity transceiver with registers. The device can operate as a feed-through transceiver or it can generate/check parity from the two 8-bit data buses in either direction.
DGG PACKAGE (TOP VIEW)
1CLKENAB 1 LEAB 2
CLKAB 3 1ERRA 4 1APAR 5
GND 6 1A1 7 1A2 8 1A3 9 VCC 10 1A4 11 1A5 12 1A6 13 GND 14 1A7 15 1A8 16 2A1 17 2A2 18 GND 19 2A3 20 2A4 21 2A5 22 VCC 23 2A6 24 2A7 25 2A8 26 GND 27 2APAR 28 2ERRA 29 OEAB 30 SEL 31 2CLKENAB 32
64 1CLKENBA 63 LEBA 62 CLKBA 61 1ERRB 60 1BPAR 59 GND 58 1B1 57 1B2 56 1B3 55 VCC 54 1B4 53 1B5 52 1B6 51 GND 50 1B7 49 1B8 48 2B1 47 2B2 46 GND 45 2B3 44 2B4 43 2B5 42 VCC 41 2B6 40 2B7 39 2B8 38 GND 37 2BPAR 36 2ERRB 35 OEBA 34 ODD/EVEN 33 2CLKENBA
The SN74ALVCH16901 features independent clock (CLKAB or CLKBA), latch-enable (LEAB or LEBA), and dual 9-bit clock-enable...
