SN74AS646 Datasheet | Texas Instruments

description SN54ALS646, SN54ALS648, SN54AS646 . . . JT PACKAGE SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648 . . . DW OR NT PACKAGE (TOP VIEW) CLKAB 1 SAB 2 DIR 3 A1 4 A2 5 A3 6 A4 7 A5 8 A6 9 A7 10 A8 11 GND 12 24 VCC 23 CLKBA 22 SBA 21 OE 20 B1 19 B2 18 B3 17 B4 16 B5 15 B6 14 B7 13 B8 These devices consist of bus-transceiver circuits with 3-state or open-collector outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the octal bus transceivers and registers. Output-enable (OE) and direction-control (DIR) inputs control the transceiver functions. In the transceiver mode, data present at the highimpedance port may be stored in either or both registers. SN54ALS646, SN54ALS648, SN54AS646 . . . FK PACKAGE (TOP VIEW) DIR SAB CLKAB NC VCC CLKBA SBA 4 3 2 1 28 27 26 A1 5 25 OE A2 6 24 B1 A3 7 23 B2 NC 8 22 NC A4 9 21 B3 A5 10 20 B4 A6 1112 13 14 15 16 17 1819 B5 A7 A8 GND NC B8 B7 B6 The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) - No internal connection data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. DIR determines which bus receives data when OE is low. In the isolation mode (OE high), A data may be stored in one register and /or B data may be stored in the other register. When an output function is disabled, the input function is still enabled and can be used to store and transmit data. Only one of the two buses, A or B, may be driven at a time. The -1 version of the SN74ALS646A is identical to the standard version, except that the remended...