SN74AUC244 Datasheet | Texas Instruments

D Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation D Ioff Supports Partial-Power-Down Mode Operation D Sub 1-V Operable D Max tpd of 1.9 ns at 1.8 V D Low Power Consumption, 20-µA Max ICC D ±8-m A Output Drive at 1.8 V D Latch-Up Performance Exceeds 100 m A Per JESD 78, Class II D ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101) GND 2A1 SN74AUC244 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SCES432 - MARCH 2003 RGY PACKAGE (TOP VIEW) 1OE VCC 1A1 2 2Y4 3 1A2 4 2Y3 5 1A3 6 2Y2 7 1A4 8 2Y1 9 1 10 20 19 2OE 18 1Y1 17 2A4 16 1Y2 15 2A3 14 1Y3 13 2A2 12 1Y4 11 description/ordering information This octal buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation. The SN74AUC244 is organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING - 40°C to 85°C...