SN74AUC2G32 Datasheet | Texas Instruments

.ti. SN74AUC2G32 DUAL 2-INPUT POSITIVE-OR GATE SCES478C - AUGUST 2003 - REVISED JANUARY 2007 Features - Available in the Texas Instruments Nano Free™ Package - Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation - Ioff Supports Partial-Power-Down Mode Operation - Sub-1-V Operable - Max tpd of 1.5 ns at 1.8 V - Low Power Consumption, 10 µA at 1.8 V - ±8-m A Output Drive at 1.8 V - Latch-Up Performance Exceeds 100 m A Per JESD 78, Class II - ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101) DCT PACKAGE (TOP VIEW) 1A 1 1B 2 2Y 3 8 VCC 7 1Y 6 2B 1A 1B 2Y GND DCU PACKAGE (TOP VIEW) 18 27 36 45 VCC 1Y 2B 2A YZP PACKAGE (BOTTOM VIEW) GND 4 5 2A 2Y 3 6 2B 1B 2 7 1Y 1A 1 8 VCC 5 2A See mechanical drawings for...