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SN74AUP2G07 - Low-Power Dual Buffer/Driver

General Description

The SN74AUP2G07 device is a dual buffer gate with open drain output that operates from 0.8 V to 3.6 V.

Key Features

  • Low static-power consumption (ICC = 0.9 µA maximum).
  • Low dynamic-power consumption (Cpd = 1 pF typical at 3.3 V).
  • Low input capacitance (Ci = 1.5 pF typical).
  • Low noise.
  • overshoot and undershoot.

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Other Datasheets by Texas Instruments

Part Number Description
SN74AUP2G00 LOW-POWER DUAL 2-INPUT POSITIVE-NAND GATE
SN74AUP2G00-Q1 LOW-POWER DUAL 2-INPUT POSITIVE-NAND GATE
SN74AUP2G02 LOW-POWER DUAL 2-INPUT POSITIVE-NOR GATE
SN74AUP2G04 LOW-POWER DUAL INVERTER GATE
SN74AUP2G06 LOW-POWER DUAL INVERTER BUFFER/DRIVER

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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SN74AUP2G07 SCES748E – SEPTEMBER 2009 – REVISED OCTOBER 2021 SN74AUP2G07 Low-Power Dual Buffer/Driver With Open-Drain Outputs 1 Features • Low static-power consumption (ICC = 0.9 µA maximum) • Low dynamic-power consumption (Cpd = 1 pF typical at 3.3 V) • Low input capacitance (Ci = 1.5 pF typical) • Low noise – overshoot and undershoot <10% of VCC • Ioff supports live insertion, partial-power-down mode, and back-drive protection • Input hysteresis allows slow input transition and better switching noise immunity at the input (Vhys = 250 mV typical at 3.3 V) • Wide operating VCC range of 0.8 V to 3.6 V • Optimized for 3.3 V operation • 3.6-V I/O tolerant to support mixed-mode signal operation • tpd = 3.3 ns maximum at 3.