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SN74AUP3G34 - LOW-POWER TRIPLE BUFFER GATE

Datasheet Summary

Description

applications.

Features

  • 1.
  • 2 Available in the Texas Instruments NanoStar™ Package.
  • Low Static-Power Consumption (ICC = 0.9 μA Maximum).
  • Low Dynamic-Power Consumption (Cpd = 4.3 pF Typ at 3.3 V).
  • Low Input Capacitance (Ci = 1.5 pF Typical).
  • Low Noise.
  • Overshoot and Undershoot.

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Datasheet preview – SN74AUP3G34

Datasheet Details

Part number SN74AUP3G34
Manufacturer Texas Instruments
File Size 1.24 MB
Description LOW-POWER TRIPLE BUFFER GATE
Datasheet download datasheet SN74AUP3G34 Datasheet
Additional preview pages of the SN74AUP3G34 datasheet.

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Full PDF Text Transcription

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SN74AUP3G34 www.ti.com SCES766C – DECEMBER 2009 – REVISED FEBRUARY 2012 LOW-POWER TRIPLE BUFFER GATE Check for Samples: SN74AUP3G34 FEATURES 1 •2 Available in the Texas Instruments NanoStar™ Package • Low Static-Power Consumption (ICC = 0.9 μA Maximum) • Low Dynamic-Power Consumption (Cpd = 4.3 pF Typ at 3.3 V) • Low Input Capacitance (Ci = 1.5 pF Typical) • Low Noise – Overshoot and Undershoot <10% of VCC • Ioff Supports Partial-Power-Down Mode Operation • Wide Operating VCC Range of 0.8 V to 3.6 V • Optimized for 3.3-V Operation • 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation • tpd = 4.3 ns Maximum at 3.
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