SN74CBTLV3126 Datasheet | Texas Instruments

Features - Standard 126-type pinout - 5-Ω switch connection between two ports - Rail-to-rail switching on data I/O ports - Ioff supports partial-power-down mode operation - Latch-up performance exceeds 100 m A per JESD 78, Class II 2 Applications - Datacenter and enterprise puting - Broadband fixed line access - Building automation - Wired networking - Motor drives SPACER SPACER 3 Description The SN74CBTLV3126 quadruple FET bus switch features independent line switches. Each switch is disabled when the associated output-enable (OE) input is low. This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The SN74CBTLV3126 device has isolation during power off. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pull down resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Package Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) SOIC (D, 14) 8.65 mm × 3.91 mm TVSOP (DGV, 14) 3.60 mm × 4.40 mm SN74CBTLV3126 TSSOP (PW, 14) 5.00 mm × 4.40 mm VQFN (RGY, 14) 4.00 mm × 3.50 mm SSOP (DBQ, 16) 4.90 mm × 3.90 mm (1) For all available packages, see the package option addendum at the end of the data sheet. (OE) Simplified Schematic, Each FET Switch An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. SCDS038L - DECEMBER 1997 - REVISED AUGUST 2022 .ti. Table of Contents 1...