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SN74LV4046A - High-Speed CMOS Logic Phase-Locked Loop

Description

The SN74LV4046A is a high-speed silicon-gate CMOS device that is pin compatible with the CD4046B and the CD74HC4046.

The device is specified in compliance with JEDEC Std 7.

Features

  • 1 ESD Protection Exceeds JESD 22.
  • 2000-V Human Body Model (A114-A).
  • 1000-V Charged-Device Model (C101).
  • Choice of Three Phase Comparators.
  • Exclusive OR.
  • Edge-Triggered J-K Flip-Flop.
  • Edge-Triggered RS Flip-Flop.
  • Excellent VCO Frequency Linearity.
  • VCO-Inhibit Control for ON/OFF Keying and for Low Standby Power Consumption.
  • Optimized Power-Supply Voltage Range From 3 V to 5.5 V.
  • Wide Operating Temper.

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Product Folder Sample & Buy Technical Documents Tools & Software Support & Community SN74LV4046A SCES656E – FEBRUARY 2006 – REVISED NOVEMBER 2016 SN74LV4046A High-Speed CMOS Logic Phase-Locked Loop With VCO 1 Features •1 ESD Protection Exceeds JESD 22 – 2000-V Human Body Model (A114-A) – 1000-V Charged-Device Model (C101) • Choice of Three Phase Comparators – Exclusive OR – Edge-Triggered J-K Flip-Flop – Edge-Triggered RS Flip-Flop • Excellent VCO Frequency Linearity • VCO-Inhibit Control for ON/OFF Keying and for Low Standby Power Consumption • Optimized Power-Supply Voltage Range From 3 V to 5.
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