Datasheet4U Logo Datasheet4U.com

SN74LV8T573 - Octal D-Type Transparent Latches

Description

Wide operating range of 1.65V to 5.5V 5.5V tolerant input pins Single-supply voltage translator (refer to LVxT Enhanced Input Voltage): Up translation: 1.2V to 1.8V 1.5V to 2.5V 1.8V to 3.3V 3.3V to 5.0V Down

Features

  • 3.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
SN74LVC1G125 high performance non-inverting buffer UMW
SN74LVC1G34 Single buffer UMW
SN74L71 AND-Gate R-S Master-Slave F-F National Semiconductor
SN74L74N Dual D-Type Flip-Flop ETC
SN74LS00 QUAD 2-INPUT NAND GATE Motorola

Other Datasheets by Texas Instruments

Part Number Description
SN74LV8T574 Octal D-Type Edge-Triggered Flip-Flops
SN74LV8151 10-BIT UNIVERSAL SCHMITT-TRIGGER BUFFER
SN74LV8153 SERIAL-TO-PARALLEL INTERFACE
SN74LV8153-Q1 SERIAL-TO-PARALLEL INTERFACE
SN74LV8154 Dual 16-Bit Binary Counters

Full PDF Text Transcription

Click to expand full text
SN74LV8T573 SLVSJZ6 – SEPTEMBER 2025 SN74LV8T573 Octal D-Type Transparent Latches with 3-State Outputs and Integrated Level Translation 1 Features 3 Description • Wide operating range of 1.65V to 5.5V • 5.5V tolerant input pins • Single-supply voltage translator (refer to LVxT Enhanced Input Voltage): – Up translation: • 1.2V to 1.8V • 1.5V to 2.5V • 1.8V to 3.3V • 3.3V to 5.0V – Down translation: • 5.0V, 3.3V, 2.5V to 1.8V • 5.0V, 3.3V to 2.5V • 5.0V to 3.3V • Up to 150Mbps with 5V or 3.3V VCC • Supports standard function pinout • Latch-up performance exceeds 250mA per JESD 17 2 Applications • Parallel data storage • Digital bus buffer The SN74LV8T573 contains eight D-type latches. All channels share a latch enable (LE) input and output enable (OE) input.
Published: |