SN74LVCZ16240A Datasheet | Texas Instruments

description /ordering information This 16-bit buffer/driver is designed for 2.7-V to 3.6-V VCC operation. The SN74LVCZ16240A is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. This device provides inverting outputs. DGG, DGV, OR DL PACKAGE (TOP VIEW) 1OE 1 1Y1 2 1Y2 3 GND 4 1Y3 5 1Y4 6 VCC 7 2Y1 8 2Y2 9 GND 10 2Y3 11 2Y4 12 3Y1 13 3Y2 14 GND 15 3Y3 16 3Y4 17 VCC 18 4Y1 19 4Y2 20 GND 21 4Y3 22 4Y4 23 4OE 24 48 2OE 47 1A1 46 1A2 45 GND 44 1A3 43 1A4 42 VCC 41 2A1 40 2A2 39 GND 38 2A3 37 2A4 36 3A1 35 3A2 34 GND 33 3A3 32 3A4 31 VCC 30 4A1 29 4A2 28 GND 27 4A3 26 4A4 25 3OE Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. During power up or power down when VCC is between 0 and 1.5 V, the device is in the high-impedance state. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING - 40°C to 85°C SSOP - DL TSSOP - DGG Tube Tape and reel Tape and reel SN74LVCZ16240ADL SN74LVCZ16240ADLR SN74LVCZ16240ADGGR LVCZ16240A LVCZ16240A TVSOP - DGV Tape and reel SN74LVCZ16240ADGVR CW240A † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at .ti./sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication...