SN74LVCZ32240A Datasheet | Texas Instruments

FEATURES - Member of the Texas Instruments Widebus+™ Family - Operates From 2.7 V to 3.6 V - Inputs Accept Voltages to 5.5 V - Max tpd of 4.2 ns at 3.3 V - Ioff and Power-Up 3-State Support Hot Insertion SN74LVCZ32240A 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS SCES421A - JANUARY 2003 - REVISED JULY 2005 - Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC) - Latch-Up Performance Exceeds 100 m A Per JESD 78, Class II - ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 1000-V Charged-Device Model (C101) DESCRIPTION /ORDERING INFORMATION This 32-bit buffer/driver is designed for 2.7-V to 3.6-V VCC operation. The SN74LVCZ32240A is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can be used as eight 4-bit buffers, four 8-bit buffers, two 16-bit buffers, or one 32-bit buffer. This device provides inverting outputs. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. During power up or power down, when VCC is between 0 and 1.5 V, the device is in the high-impedance state. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down (VCC = 0 V). The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. ORDERING INFORMATION - 40°C to 85°C PACKAGE (1) LFBGA - GKE Tape and reel ORDERABLE PART NUMBER SN74LVCZ32240AGKER TOP-SIDE MARKING ZC240A (1)...