SN74LVT543 Datasheet | Texas Instruments

description These octal transceivers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. SN54LVT543 . . . JT PACKAGE SN74LVT543 . . . DB, DW, OR PW PACKAGE (TOP VIEW) LEBA 1 OEBA 2 A1 3 A2 4 A3 5 A4 6 A5 7 A6 8 A7 9 A8 10 CEAB 11 GND 12 24 VCC 23 CEBA 22 B1 21 B2 20 B3 19 B4 18 B5 17 B6 16 B7 15 B8 14 LEAB 13 OEAB SN54LVT543 . . . FK PACKAGE (TOP VIEW) A1 OEBA LEBA NC VCC CEBA B1 4 3 2 1 28 27 26 A2 5 25 B2 A3 6 24 B3 A4 7 23 B4 NC 8 22 NC A5 9 21 B5 A6 10 20 B6 A7 11 19 B7 12 13 14 15 16 17 18 A8 CEAB GND NC OEAB LEAB B8 The ’LVT543 contain two sets of D-type latches for temporary storage of data flowing in either direction. Separate latch-enable (LEAB or LEBA) and output-enable (OEAB or OEBA) inputs are provided for each register to permit independent control in either direction of data flow. - No internal connection The A-to-B enable (CEAB) input must be low in order to enter data from A or to output data from B. If CEAB is low and LEAB is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB puts the A latches in the storage mode. With CEAB and OEAB both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar but requires using the CEBA, LEBA, and OEBA inputs. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of...