• Part: SN74LVTH16374
  • Description: 3.3-V ABT 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS
  • Manufacturer: Texas Instruments
  • Size: 1.02 MB
Download SN74LVTH16374 Datasheet PDF
Texas Instruments
SN74LVTH16374
SN74LVTH16374 is 3.3-V ABT 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS manufactured by Texas Instruments.
FEATURES - 2 Members of the Texas Instruments Widebus™ Family - State-of-the-Art Advanced Bi CMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation - Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC) - Support Unregulated Battery Operation Down to 2.7 V - Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C - Ioff and Power-Up 3-State Support Hot Insertion - Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors - Distributed VCC and GND Pins Minimize High-Speed Switching Noise - Flow-Through Architecture Optimizes PCB Layout - Latch-Up Performance Exceeds 500 m A Per JESD 17 - ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) SN54LVTH16374 . . . WD PACKAGE SN74LVTH16374 . . . DGG OR DL PACKAGE (TOP VIEW) 1OE 1 1Q1 2 1Q2 3 GND 4 1Q3 5 1Q4 6 VCC 7 1Q5 8 1Q6 9 GND 10 1Q7 11 1Q8 12 2Q1 13 2Q2 14 GND 15 2Q3 16 2Q4 17 VCC 18 2Q5 19 2Q6 20 GND 21 2Q7 22 2Q8 23 2OE 24 48 1CLK 47 1D1 46 1D2 45 GND 44 1D3 43 1D4 42 VCC 41 1D5 40 1D6 39 GND 38 1D7 37 1D8 36 2D1 35 2D2 34 GND 33 2D3 32 2D4 31 VCC 30 2D5 29 2D6 28 GND 27 2D7 26 2D8 25 2CLK DESCRIPTION /ORDERING INFORMATION The 'LVTH16374 devices are 16-bit edge-triggered D-type flip-flops with 3-state outputs designed for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. These devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. These devices can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CLK), the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs...