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SN74LVTH273-EP Datasheet 3.3-v Abt Octal D-type Flip-flops

Manufacturer: Texas Instruments

Overview: D Controlled Baseline − One Assembly/Test Site, One Fabrication Site D Enhanced Diminishing Manufacturing Sources (DMS) Support D Enhanced Product-Change Notification D Qualification Pedigree† D Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC ) D Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C D Supports Unregulated Battery Operation Down to 2.7 V D Buffered Clock and Direct-Clear Inputs D Individual Data Input to Each Flip-Flop D Ioff Supports Partial Power-Down-Mode Operation † ponent qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold pound life. Such qualification testing should not be viewed as justifying use of this ponent beyond specified performance and environmental limits. SN74LVTH273ĆEP 3.

General Description

/ordering information This octal D-type flip-flop is designed specifically for low-voltage (3.3 V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.

The SN74LVTH273 is a positive-edge-triggered flip-flop with a direct clear (CLR) input.

Information at the data (D) inputs meeting the setup-time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse.

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