SN74SSTU32864C
FEATURES
- Member of the Texas Instruments Widebus+™ Family
- Pinout Optimizes DDR2 DIMM PCB Layout
- Configurable as 25-Bit 1:1 or 14-Bit 1:2
Registered Buffer
- Chip-Select Inputs Gate Data Outputs From
Changing State and Minimize System Power Consumption
- Output Edge-Control Circuitry Minimizes Switching Noise in Unterminated Line
- Supports SSTL_18 Data Inputs
SN74SSTU32864C 25-BIT CONFIGURABLE REGISTERED BUFFER
WITH SSTL_18 INPUTS AND OUTPUTS
SCES542A
- JANUARY 2004
- REVISED FEBRUARY 2005
- Differential Clock (CLK and CLK) Inputs
- Supports LVCMOS Switching Levels on
Control and RESET Inputs
- RESET Input Disables Differential Input Receivers, Resets All Registers, and Forces All Outputs Low
- Latch-Up Performance Exceeds 100 m A Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
DESCRIPTION
/ORDERING INFORMATION
This 25-bit 1:1 or 14-bit 1:2 configurable registered buffer...
