SN74SSTU32864C Overview
/ORDERING INFORMATION This 25-bit 1:1 or 14-bit 1:2 configurable registered buffer is designed for 1.7-V to 1.9-V VCC operation. In the 1:1 pinout configuration, only one device per DIMM is required to drive nine SDRAM loads. In the 1:2 pinout configuration, two devices per DIMM are required to drive 18 SDRAM loads.
SN74SSTU32864C Key Features
- Member of the Texas Instruments Widebus+™ Family
- Pinout Optimizes DDR2 DIMM PCB Layout
- Configurable as 25-Bit 1:1 or 14-Bit 1:2
- Chip-Select Inputs Gate Data Outputs From
- Output Edge-Control Circuitry Minimizes Switching Noise in Unterminated Line
- Supports SSTL_18 Data Inputs
- JANUARY 2004
- REVISED FEBRUARY 2005
- Differential Clock (CLK and CLK) Inputs
- Supports LVCMOS Switching Levels on