SNJ54HC191J Datasheet | Texas Instruments

ription/ordering information The ’HC191 devices are 4-bit synchronous, reversible, up/down binary counters. Synchronous counting operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when instructed by the steering logic. This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple-clock) counters. The outputs of the four flip-flops are triggered on a low- to high-level transition of the clock (CLK) input if the count-enable (CTEN) input is low. A high at CTEN inhibits counting. The direction of the count is determined by the level of the down/up (D/U) input. When D/U is low, the counter counts up, and when D/U is high, it counts down. SCLS121D - DECEMBER 1982 - REVISED OCTOBER 2003 SN54HC191 . . . J OR W PACKAGE SN74HC191 . . . D, N, OR NS PACKAGE (TOP VIEW) B1 QB 2 QA 3 CTEN 4 D/U 5 QC 6 QD 7 GND 8 16 VCC 15 A 14 CLK 13 RCO 12 MAX/MIN 11 LOAD 10 C 9D SN54HC191 . . . FK PACKAGE (TOP VIEW) QB B NC VCC A QA CTEN NC D/U QC 3 2 1 20 19 9 10 11 12 13 CLK RCO NC MAX/MIN LOAD QD GND NC D C - No internal connection ORDERING INFORMATION PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP - N Tube of...