SNJ54HC74J Overview
The SNx4HC74 devices contain two independent Dtype positive-edge-triggered flip-flops. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock (CLK) pulse.
SNJ54HC74J Key Features
- 1 Wide Operating Voltage Range: 2 V to 6 V
- Outputs Can Drive Up To 10 LSTTL Loads
- Low Power Consumption, 40-µA Maximum ICC
- Typical tpd = 15 ns
- ±4-mA Output Drive at 5 V
- Very Low Input Current of 1 µA