THS5651A Datasheet | Texas Instruments

D Member of the Pin-patible ms DAC Product Family D 125 MSPS Update Rate D 10-Bit Resolution D Superior Spurious Free Dynamic Range Performance (SFDR) to Nyquist at 40 MHz Output: 62 d Bc D 1 ns Setup/Hold Time D Differential Scalable Current Outputs: 2 m A to 20 m A D On-Chip 1.2-V Reference D 3 V and 5 V CMOS-patible Digital Interface D Straight Binary or Twos plement Input D Power Dissipation: 175 m W at 5 V, Sleep Mode: 25 m W at 5 V D Package: 28-Pin SOIC and TSSOP THS5651A 10ĆBIT, 125 MSPS, ms DAC DIGITALĆTOĆANALOG CONVERTER SLAS260A - FEBRUARY 2000 - REVISED SEPTEMBER 2002 SOIC (DW) OR TSSOP (PW) PACKAGE (TOP VIEW) D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 DVDD DGND MODE AVDD P2 IOUT1...