THS6204 Datasheet | Texas Instruments

FEATURES - 23 Low Power Consumption: - 21m A/Port Full Bias Mode - 16.2m A/Port Mid Bias Mode - 11.2m A/Port Low Bias Mode - Low-Power Shutdown Mode - IADJ Pin for Variable Bias - Low Noise: - 2.5n V/√Hz Voltage Noise - 17p A/√Hz Inverting Current Noise - 1.2p A/√Hz Noninverting Current Noise - Low MTPR Distortion: - 70d B with +20.5d Bm G.993.2- Profile 8b - - 89d Bc HD3 (1MHz, 100Ω Differential) - High Output Current: > 424m A (25Ω Load) - Wide Output Swing: 43.2VPP (±12V, 100Ω Differential) - Wide Bandwidth: 150MHz (Gain = 10V/V) - Port-To-Port Separation of 90d B at 1MHz - PSRR of 50d B at 1MHz for Good Isolation - Wide Power-Supply Range: 10V to 28V APPLICATIONS - Ideal For VDSL2 Systems - Backward-patible with ADSL/ADSL2+/ADSL2++ Systems DESCRIPTION The THS6204 is a dual-port, current-feedback architecture, differential line driver amplifier system ideal for x DSL systems. The device is targeted for use in VDSL2 (very-high-bit-rate digital subscriber line 2) line driver systems that enable greater than +20.5d Bm line power up to 8.5MHz with good linearity supporting the G.993.2 VDSL2 8b profile. It is also fast enough to support central-office transmission of +14.5d Bm line power up to 18.1MHz- Profile 30a. The unique architecture of the THS6204 allows quiescent current to be minimal while still achieving very high linearity. Differential distortion, under full bias conditions, is - 89d Bc at 1MHz and reduces to only - 73d Bc at 10MHz. Fixed multiple bias settings of the amplifiers allows for enhanced power savings for line lengths where the full performance of the amplifier is not required. To allow for even more flexibility and power savings, an IADJ pin is available to further lower the bias currents. The wide output swing of 43.2VPP (100Ω differentially) with ±12V power supplies, coupled with over 425m A current drive (25Ω), allows for wide dynamic headroom, keeping distortion minimal. The THS6204 is available in a QFN-24 or a TSSOP-24 Power PAD™ package. CODEC...