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TMS27C128 Datasheet Programmable Rom

Manufacturer: Texas Instruments

Overview: TMS27C128 131 072-BIT UV ERASABLE PROGRAMMABLE READ-ONLY MEMORY TMS27PC128 131 072-BIT PROGRAMMABLE READ-ONLY MEMORY This Data Sheet is Applicable to All TMS27C128s and TMS27PC128s Symbolized with Code “B” as Described on Page 12. • Organization . . . 16K × 8 • Single 5-V Power Supply • Pin patible With Existing 128K MOS ROMs, PROMs, and EPROMs • All Inputs/Outputs Fully TTL patible • Max Access/Min Cycle Times VCC ± 10% ’27C128-12 ’27C/PC128-15 ’27C/PC128-20 ’27C/PC128-25 120 ns 150 ns 200 ns 250 ns • Power Saving CMOS Technology • Very High-Speed SNAP! Pulse Programming • 3-State Output Buffers • 400-mV Minimum DC Noise Immunity With Standard TTL Loads • Latchup Immunity of 250 mA on All Input and Output Lines • Low Power Dissipation ( VCC = 5.25 V ) – Active . . . 158 mW Worst Case – Standby . . . 1.

General Description

The TMS27C128 series are 131 072-bit, ultraviolet-light erasable, electrically programmable read-only memories.

The TMS27PC128 series are 131 072-bit, one time electrically programmable read-only memories.

SMLS128E–OCTOBER 1984–REVISED JANUARY 1993 J AND N PACKAGES (TOP VIEW) VPP A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 VCC 27 PGM 26 A13 25 A8 24 A9 23 A11 22 G 21 A10 20 E 19 DQ7 18 DQ6 17 DQ5 16 DQ4 15 DQ3 FM PACKAGE (TOP VIEW) A7 A12 VPP NU VCC PGM A13 A6 A5 A4 A3 A2 A1 A0 NC DQ0 4 3 2 1 32 31 30 5 29 6 28 7 27 8 26 9 25 10 24 11 23 12 22 13 21 14 15 16 17 18 19 20 A8 A9 A11 NC G A10 E DQ7 DQ6 DQ1 DQ2 VSS NU DQ3 DQ4 DQ5 PIN NOMENCLATURE A0–A13 E G GND NC NU PGM DQ0–DQ7 VCC VPP Address Inputs Chip Enable/Powerdown Output Enable Ground No Connection Make No External Connection Program Inputs (programming)/Outputs 5-V Power Supply 12-13 V Programming Power Supply P

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