Description
The TMS320F2809, TMS320F2809-Q1, TMS320F2808, TMS320F2808-Q1 TMS320F2806, TMS320F2802, TMS320F2801-Q1, TMS320F28015-Q1, TMS320F28016-Q1, TMS320C2802-Q1, and TMS320C2801 devices, members of the TMS320C28x DSP generation, are highly integrated, high-performance solutions for demanding control applications.
Features
- High-performance static CMOS technology.
- 100 MHz (10-ns cycle time).
- 60 MHz (16.67-ns cycle time).
- Low-power (1.8-V core, 3.3-V I/O) design.
- JTAG boundary scan support.
- IEEE Standard 1149.1-1990 Standard Test Access Port and Boundary Scan Architecture.
- High-performance 32-bit CPU (TMS320C28x).
- 16 × 16 and 32 × 32 MAC operations.
- 16 × 16 dual MAC.
- Harvard bus architecture.
- Atomic operations.
TMS320C2802 Datasheet
