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TMS320C6411 - Fixed-Point Digital Signal Processor

General Description

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Key Features

  • Byte-Addressable (8-/16-/32-/64-Bit Data).
  • 8-Bit Overflow Protection.
  • Bit-Field Extract, Set, Clear.
  • Normalization, Saturation, Bit-Counting.
  • VelociTI.2 Increased Orthogonality D L1/L2 Memory Architecture.
  • 128K-Bit (16K-Byte) L1P Program Cache (Direct Mapped).
  • 128K-Bit (16K-Byte) L1D Data Cache (2-Way Set-Associative).
  • 2M-Bit (256K-Byte) L2 Unified Mapped RAM/Cache (Flexible RAM/Cache Allocation) D 32-Bit External Memory I.

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Other Datasheets by Texas Instruments

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TMS320C6410 Fixed-Point Digital Signal Processors
TMS320C6412 Fixed-Point Digital Signal Processor
TMS320C6413 Fixed-Point Digital Signal Processors
TMS320C6414 Fixed-Point Digital Signal Processor
TMS320C6414T Fixed-Point Digital Signal Processor

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
TMS320C6411 FIXEDĆPOINT DIGITAL SIGNAL PROCESSOR SPRS196I − MARCH 2002 − REVISED JUNE 2005 D Low-Cost, High-Performance Fixed-Point DSP − TMS320C6411 − 3.33-ns Instruction Cycle Time − 300-MHz Clock Rate − Eight 32-Bit Instructions/Cycle − Twenty-Eight Operations/Cycle − 2400 MIPS − Fully Software-Compatible With TMS320C62x D VelociTI.2 Extensions to VelociTI Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x DSP Core − Eight Highly Independent Functional Units With VelociTI.