TMS320DM643 Datasheet | Texas Instruments

erpolated Control Port (VIC) - Supports Audio/Video Synchronization - Host-Port Interface (HPI) [32-/16-Bit] - Multichannel Audio Serial Port (Mc ASP) - Eight Serial Data Pins - Wide Variety of I2S and Similar Bit Stream Format - Integrated Digital Audio I/F Transmitter Supports S/PDIF, IEC60958-1, AES-3, CP-430 - 8-Bit Overflow Protection Formats - Bit-Field Extract, Set, Clear - Inter-Integrated Circuit ( I2C Bus™) - Normalization, Saturation, Bit-Counting - Multichannel Buffered Serial Port - Veloci TI.2™ Increased Orthogonality - CLKS Input Not Supported - L1/L2 Memory Architecture - Three 32-Bit General-Purpose Timers - 128K-Bit (16K-Byte) L1P Program Cache - Sixteen General-Purpose I/O (GPIO) Pins (Direct Mapped) - Flexible PLL Clock Generator - 128K-Bit (16K-Byte) L1D Data Cache (2-Way Set-Associative) - IEEE-1149.1 (JTAG) Boundary Scan-patible - 2M-Bit (256K-Byte) L2 Unified Mapped RAM/Cache (Flexible RAM/Cache Allocation) - Endianess: Little Endian, Big Endian - 548-Pin Ball Grid Array (BGA) Package (GDK and ZDK Suffixes), 0.8-mm Ball Pitch - 548-Pin Ball Grid Array (BGA) Package (GNZ and ZNZ Suffixes), 1.0-mm Ball Pitch - 64-Bit External Memory Interface...