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TMS320F206 Datasheet Digital Signal Processors

Manufacturer: Texas Instruments

Overview: TMS320F206 DIGITAL SIGNAL PROCESSOR D High-Performance Static CMOS Technology D Includes the T320C2xLP Core CPU D TMS320F206 is a Member of the TMS320C20x Generation, Which Also Includes the TMS320C203, and TMS320C209 Devices D Instruction-Cycle Time 50 ns @ 5 V D Source Code Compatible With TMS320C25 D Upwardly Code-Compatible With TMS320C5x Devices D Three External Interrupts D TMS320F206 Integrated Memory: – 544 × 16 Words of On-Chip Dual-Access Data RAM – 32K × 16 Words of On-Chip Flash Memory (EEPROM) – 4K × 16 Words of On-Chip Single-Access Program/ Data RAM D 224K × 16-Bit Maximum Addressable External Memory Space – 64K Program – 64K Data – 64K Input/Output (I/O) – 32K Global SPRS050A – NOVEMBER 1996 – REVISED APRIL 1998 D 32-Bit ALU/Accumulator D 16 × 16-Bit Multiplier With a 32-Bit Product D Block Moves from Data and Program Space D TMS320F206 Peripherals: – On-Chip 16-Bit Timer – On-Chip Software-Programmable Wait-State (0 to 7) Generator – On-Chip Oscillator – On-Chip Phase-Locked Loop (PLL) – Six General-Purpose I/O Pins – Full-Duplex Asynchronous Serial Port (UART) – Enhanced Synchronous Serial Port (ESSP) With Four-Level-Deep FIFOs D Input Clock Options – Options – Multiply-by-One, -Two, or -Four and Divide-by-Two D Support of Hardware Wait States D Power Down IDLE Mode D IEEE 1149.

General Description

The TMS320F206 Texas Instruments (TI™) digital signal processor (DSP) is fabricated with static CMOS integrated-circuit technology, and the architectural design is based upon that of the TMS320C20x series, optimized for low-power operation.

The combination of advanced Harvard architecture, on-chip peripherals, on-chip memory, and a highly specialized instruction set is the basis of the operational flexibility and speed of the ’F206.

The ’F206 offers these advantages: D 32K 16 words on-chip flash EEPROM reduces system cost and facilitates prototyping D Enhanced TMS320 archit

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