TMS320F280049-Q1 Datasheet | Texas Instruments

Features - TMS320C28x 32-bit CPU - 100 MHz - IEEE 754 single-precision Floating-Point Unit (FPU) - Trigonometric Math Unit (TMU) - 3×-cycle to 4×-cycle improvement for mon trigonometric functions versus software libraries - 13-cycle Park transform - Viterbi/plex Math Unit (VCU-I) - Ten hardware breakpoints (with ERAD) - Programmable Control Law Accelerator (CLA) - 100 MHz - IEEE 754 single-precision floating-point instructions - Executes code independently of main CPU - On-chip memory - 256KB (128KW) of flash (ECC-protected) across two independent banks - 100KB (50KW) of RAM (ECC-protected or parity-protected) - Dual-zone security supporting third-party development - Unique Identification (UID) number - Clock and system control - Two internal zero-pin 10-MHz oscillators - On-chip crystal oscillator and external clock input - Windowed watchdog timer module - Missing clock detection circuitry - 1.2-V core, 3.3-V I/O design - Internal VREG or DC-DC for 1.2-V generation allows for single-supply designs - Brownout reset (BOR) circuit - System peripherals - 6-channel Direct Memory Access (DMA) controller - 40 individually programmable multiplexed General-Purpose Input/Output (GPIO) pins - 21 digital inputs on analog pins - Enhanced Peripheral Interrupt Expansion (e PIE) module - Multiple low-power mode (LPM) support with external wakeup - Embedded Real-time Analysis and Diagnostic (ERAD) - munications peripherals - One Power-Management Bus (PMBus) interface - One Inter-integrated Circuit (I2C) interface (pin-bootable) - Two Controller Area Network (CAN) bus ports...