TMS370C712A Datasheet | Texas Instruments

Features -- Low-Power Modes: STANDBY and HALT -- mercial, Industrial, and Automotive Temperature Ranges -- Clock Options -- Divide-by-1 (2 MHz--5 MHz SYSCLK) Phase-Locked Loop (PLL) -- Divide-by-4 (0.5 MHz--5 MHz SYSCLK) -- Supply Voltage (VCC) 5 V 10% D 16-Bit General Purpose Timer -- Software Configurable as a 16-Bit Event Counter, or a 16-Bit Pulse Accumulator, or a 16-Bit Input Capture Functions, or Two pare Registers, or a Self-Contained PWM Function -- Software Programmable Input Polarity -- 8-Bit Prescaler, Providing a 24-Bit Real-Time Timer D On-Chip 24-Bit Watchdog Timer -- EPROM/OTP Devices: -- EPROM ’712A Standard Watchdog -- EPROM ’712B Hard Watchdog -- Mask-ROM Devices: Hard Watchdog, Simple Counter, or Standard Watchdog D Flexible Interrupt Handling -- Two Software Programmable Interrupt Levels -- Global-and Individual-Interrupt Masking -- Programmable Rising- or Falling-Edge Detect -- Individual Interrupt Vectors D Serial Peripheral Interface (SPI) -- Variable-Length High-Speed Shift Register JD AND N PACKAGES (TOP VIEW) D6 D7 A7 VCC XTAL2/CLKIN XTAL1 A6 A5 A4 A3 A2 VSS A1 A0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 D3 27 RESET 26 D4 25 SPISOMI 24 SPICLK 23 SPISIMO 22 T1IC/CR 21 T1PWM 20 T1EVT 19 MC 18 INT3 17 INT2 16 INT1 15 D5 FZ AND FN PACKAGES (TOP VIEW) V CC A7 D7 D6 D3 RESET D4 XTAL2/CLKIN XTAL1 A6 A5 A4 A3 A2 4 3 2 1 28 27 26 5 25 6 24 7 23 8 22 9 21 10 20 11 19 12 13 14 15 16 1718 SPISOMI SPICLK SPISIMO T1IC/CR T1PWM T1EVT MC VSS A1 A0 D5 INT1 INT2 INT3 -- Synchronous Master/Slave Operation D TMS370 Series patibility -- Register-to-Register Architecture -- 128 or 256 General-Purpose Registers -- 14 Powerful Addressing Modes -- Instructions Upwardly patible With All TMS370 Devices D CMOS/TTL patible I/O Pins/Packages -- All Peripheral Function Pins Software Configurable for Digital I/O -- 21 Bidirectional Pins, 1 Input Pin -- 28-Pin Plastic and Ceramic DIP, or Leaded Chip Carrier (LCC) Packages D Workstation/PC-Based...