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TMS417800A - DYNAMIC RANDOM-ACCESS MEMORIES

General Description

The TMS417800A is a 16 777 216-bit dynamic random-access memory (DRAM) device organized as 2 097 152 words of eight bits.

It employs TI’s state-of-the-art technology for high performance, reliability, and low power.

Key Features

  • maximum RAS access times of 50-, 60-, and 70 ns. All addresses and data-in lines are latched on-chip to simplify system design. Data out is unlatched to allow greater system flexibility. The TMS417800A is offered in a 28-lead plastic surface-mount SOJ package (DZ suffix). This package is designed for operation from 0°C to 70°C. TMS417800A 2097152 BY 8-BIT.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
This data sheet is applicable to all TMS417800As symbolized by Revision “E” and subsequent revisions as described in the device symbolization section. D Organization . . .