TPIC5201 Datasheet | Texas Instruments

description The TPIC5201 is a power monolithic DMOS array that consists of dual independent N-channel enhancement-mode DMOS transistors. schematic DRAIN1 3 GATE2 DRAIN2 56 GATE1 TPIC5201 DUAL POWER DMOS ARRAY ą SLIS020 - SEPTEMBER 1992 KV PACKAGE (TOP VIEW) 7 SOURCE2 6 DRAIN2 5 GATE2 4 GND 3 DRAIN1 2 1 SOURCE1 GATE1 To ensure correct device operation, the source and the drain of the same transistor cannot simultaneously be taken below GND. The tab is electrically connected to GND. 2 SOURCE1 4 GND 7 SOURCE2 absolute maximum ratings over operating case temperature range (unless otherwise noted) Drain-source voltage, VDS - - - - - - - - - - - - - 60 V Source-GND voltage - - - - - - - - - - - - - - 60 V Drain-GND...