TPS3838E18 Datasheet | Texas Instruments

ion The TPS3836, TPS3837, TPS3838 families of supervisory circuits provide circuit initialization and timing supervision, primarily for DSP and processor-based systems. During power on, RESET is asserted when the supply voltage VDD bees higher than 1.1 V. Thereafter, the supervisory circuit monitors VDD and keeps RESET output active as long as VDD remains below the threshold voltage VIT. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VDD has risen above the threshold voltage VIT. D Applications Include - Applications Using Low-Power DSPs, Microcontrollers, or Microprocessors - Portable/Battery-Powered Equipment - Intelligent Instruments - Wireless munication Systems - Notebook puters - Automotive Systems TPS3836, TPS3838 DBV PACKAGE (TOP VIEW) CT 1 5 VDD MR 3 4 RESET TPS3837 DBV PACKAGE (TOP VIEW) CT 1 5 VDD MR 3 4 RESET When CT is connected to GND a fixed delay time of typical 10 ms is asserted. When connected to VDD the delay time is typically 200 ms. When the supply voltage drops below the threshold voltage VIT, the output bees active (low) again. All the devices of this family have a fixed-sense threshold voltage VIT set by an internal voltage divider. The TPS3836 has an active-low push-pull RESET output. The TPS3837 has active-high push-pull RESET, and TPS3838 integrates an active-low open-drain RESET output. TPS3836K33 VDD MSP430 VCC CT RESET Xin Lithium Battery Xout Quartz 3.6 V T...