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TPS53317 - Integrated-FET Converter

General Description

The TPS53317 device is a FET-integrated synchronous buck regulator designed mainly for DDR termination.

It can provide a regulated output at ½ VDDQ with both sink and source capability.

Key Features

  • 1 TI proprietary Integrated MOSFET and Packaging Technology.
  • Supports DDR Memory Termination with up to 6-A Continuous Output Source or Sink Current.
  • External Tracking.
  • Minimum External Components Count.
  • 1-V to 6-V Conversion Voltage.
  • D-CAP+™ Mode Architecture.
  • Supports All MLCC Output Capacitors and SP/POSCAP.
  • Selectable SKIP Mode or Forced CCM.
  • Optimized Efficiency at Light and Heavy Loads.
  • Selectable 600.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Product Folder Sample & Buy Technical Documents Tools & Software Support & Community TPS53317 SLUSAK4D – JUNE 2011 – REVISED JULY 2015 TPS53317 6-A Output, D-CAP+ Mode, Synchronous Step-Down, Integrated-FET Converter for DDR Memory Termination 1 Features •1 TI proprietary Integrated MOSFET and Packaging Technology • Supports DDR Memory Termination with up to 6-A Continuous Output Source or Sink Current • External Tracking • Minimum External Components Count • 1-V to 6-V Conversion Voltage • D-CAP+™ Mode Architecture • Supports All MLCC Output Capacitors and SP/POSCAP • Selectable SKIP Mode or Forced CCM • Optimized Efficiency at Light and Heavy Loads • Selectable 600-kHz or 1-MHz Switching Frequency • Selectable Overcurrent Limit (OCL) • Overvoltage, Over-Temperature and Hiccup Under