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TPS65218 SLDS206E – NOVEMBER 2014 – REVISED FEBTRPUASR6Y52201281
SLDS206E – NOVEMBER 2014 – REVISED FEBRUARY 2021
TPS65218 Power Management for ARM® Cortex™-A8/A9 SOCs and FPGA
1 Features
• Three Adjustable Step-Down Converters With Integrated Switching FETs (DCDC1, DCDC2, and DCDC3): – DCDC1: 1.1-V Default, up to 1.8 A – DCDC2: 1.1-V Default, up to 1.8 A – DCDC3: 1.2-V Default, up to 1.8 A – VIN Range From 2.7 V to 5.5 V – Adjustable Output Voltage Range 0.85 V to 1.675 V (DCDC1 and DCDC2) – Adjustable Output Voltage Range 0.9 V to 3.4 V (DCDC3) – Power Save Mode at Light Load Current – 100% Duty Cycle for Lowest Dropout – Active Output-Discharge When Disabled
• One Adjustable Buck-Boost Converter With Integrated Switching FETs (DCDC4): – DCDC4: 3.3-V Default, up to 1.
TPS65218 Datasheet
