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TPS66021 - Integrated Source and Sink Power Multiplexer

Download the TPS66021 datasheet PDF. This datasheet also covers the TPS66020 variant, as both devices belong to the same integrated source and sink power multiplexer family and are provided as variant models within a single manufacturer datasheet.

Description

The TPS6602x is a full-featured power switch multiplexer that contains an integrated 5-V Source power path and a 4-V to 22-V Sink power path.

Features

  • 1 Integrated 30 mΩ (typical), 32-V tolerant NFET 5V source path, up to 3 A.
  • Integrated 22 mΩ (typical), 32-V tolerant NFET 4V to 22-V sink path, up to 5 A.
  • Selectable current limit for 5-V source path.
  • Built-in soft-start to limit in-rush currents.
  • Integrated high voltage VBUS LDO regulator (3.3- V or 5.0-V per device type).
  • Optional VBUS overvoltage protection via pin configuration.
  • System supply and VBUS undervoltage protection.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (TPS66020-etcTI.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by Texas Instruments

Part Number Description
TPS66020 Integrated Source and Sink Power Multiplexer
TPS66120 Integrated Sink
TPS66121 Integrated Sink
TPS60100 Regulated 3.3-V 200-mA Low-Noise Charge Pump DC/DC Converter
TPS60101 Regulated 3.3-V High-Power Low-Noise Charge Pump DC/DC Converter

Full PDF Text Transcription

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Product Folder Order Now Technical Documents Tools & Software Support & Community TPS66020, TPS66021 SLVSEW8B – AUGUST 2019 – REVISED DECEMBER 2019 TPS6602x Integrated Source and Sink Power Multiplexer with VBUS LDO Regulator 1 Features •1 Integrated 30 mΩ (typical), 32-V tolerant NFET 5V source path, up to 3 A • Integrated 22 mΩ (typical), 32-V tolerant NFET 4V to 22-V sink path, up to 5 A • Selectable current limit for 5-V source path • Built-in soft-start to limit in-rush currents • Integrated high voltage VBUS LDO regulator (3.3- V or 5.0-V per device type) • Optional VBUS overvoltage protection via pin configuration.
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