TPS7A37 Overview
The TPS7A37 family of linear low-dropout (LDO) voltage regulators uses an NMOS pass element in a voltage-follower configuration. This topology is relatively insensitive to output capacitor value and ESR, allowing a wide variety of load configurations. Load transient response is excellent, even with a small 1-μF ceramic output capacitor.
TPS7A37 Key Features
- 1 Stable with 1-μF or Larger Ceramic Output Capacitor
- Input Voltage Range: 2.2 V to 5.5 V
- Ultralow Dropout Voltage
- 200-mV Maximum at 1 A
- NMOS Topology Delivers Low Reverse Leakage
- Excellent Accuracy
- 0.23% Nominal Accuracy
- 1% Overall Accuracy Over Line, Over Load
- Less Than 20-nA typical IQ in Shutdown Mode
- Thermal Shutdown and Current Limit for Fault
TPS7A37 Applications
- Point of Load Regulation for DSPs, FPGAs, ASICs, and Microprocessors
- Post-Regulation for Switching Supplies